(a) Field of the Invention
The present invention relates to a drive circuit for an image display unit and, more particularly, to a drive circuit for driving an image display unit to display thereon multi-level gray-scale digital video data. The present invention also relates to a method for operating such a drive circuit.
(b) Description of the Prior Art
FIG. 1 illustrates the configuration of a conventional drive circuit for use in an image display unit such as a liquid crystal display (LCD) unit. This drive circuit is used for displaying digital video data of 240 pixels each having six bits, or data of 240 pixels by 6 bits/pixel.
The drive circuit of FIG. 1 includes an 80-bit shift register 901, a data register block 902, a data latch block 903, a gray-scale voltage selector block 904, an output amplifier block 905, and a gray-scale voltage generator 906. Power source voltages VDD1 and VSS1 are supplied to the 80-bit shift register 901, the data register block 902, and the data latch block 903, while power source voltages VDD2 and VSS2 are supplied to the gray-scale voltage selector block 904, and the output amplifier block 905.
The 80-bit shift register 901 shifts an input pulse in the direction specified by an R/L signal at each cycle of the clock (CLK) signal. More specifically, if the R/L signal indicates the right direction, an STHR signal supplied at the leftmost end of the 80-bit shift register 901 is shifted at each cycle of the CLK signal to output the resulting signal to the data register block 902 as an STHL signal after 80 cycles of the CLK signal. Since the STHR signal includes a single pulse having a width of one clock pulse, pulses are output successively through terminals C1, C2, . . . C79, and C80 of the shift register 901 while the STHR signal is being shifted. On the other hand, if the R/L signal indicates the left direction, an STHL signal supplied at the rightmost end of the shift register 901 is shifted at each cycle of the CLK signal to output the resulting signal to the data register block 902 as an STHR signal after 80 cycles of the CLK signal. Since the STHL signal includes also a single pulse having a width of one clock, pulses are output successively through terminals C80, C79, . . . C2, and C1 of the shift register 901 while the STHL signal is being shifted.
The data register block 902 has a storage capacity of 1440 bits or a storage capacity for 240 pixels, receives video data D00-D25 for three pixels each including 6 bits in parallel at each cycle of the CLK signal, and successively stores video data in the data register block 902. That is, the video data input to the data register block 902 is successively stored in the data registers of the data register block 902 through terminals C1, C2, . . . C79, and C80.
The data latch block 903 latches the 240-pixel video data supplied from the data register block 902 at once when a LATCH signal is active. The data latch block 903 has a capacity of 240-pixel data, and is provided because, while the amplifier block 905 is outputting the video data for one line, the next video data for another line is input to the data register block 902.
The gray-scale voltage generator 906 is configured as shown in FIG. 2, receiving specific gray-scale voltages V0 to V8, providing gray-scale voltage at eight tap points of a resistor ladder or resister string which divides each adjacent two of the specific gray-scale voltages V0 to V8, and outputting intermediate gray-scale voltages through the tap points of the resistor ladder in association with the specific gray-scale voltages V0 to V8. Accordingly, the gray-scale voltage generator 906 outputs 64 voltage levels. By using a nonlinear adjustment of the levels of the gray-scale voltages V0-V8 in accordance with the characteristics of the LCD unit to be driven, a nonlinear correction can be obtained for the characteristics of the LCD unit with respect to the relation between the voltage and the percent transmission, such as shown in FIG. 3.
Referring to FIG. 4, the gray-scale voltage selector block 904 includes a decoder 904-1 and switches 904-2 for each pixel, the number of switches being equal to the number of gray scale levels to be displayed. The gray-scale voltage selector block 904 selects one voltage out of the 64 voltages, supplied from the gray-scale voltage generator 906, for the video data of each of the 240 pixels output from the data latch block 903 in accordance with the value of the 6 bits of video data, to output the resulting voltage as an analog signal.
The amplifier block 905 outputs the analog signal of the 240 pixels. These analog signals act as pixel signals of a single line selected by a vertical scan circuit (not shown). In addition, since a plurality of drive circuits for displaying the digital video data are arranged in the horizontal direction, all the pixel signals of the single line are made available simultaneously.
The scheme employed by the drive circuit for displaying digital video data is generally referred to as the xe2x80x9cresistor string methodxe2x80x9d. This drive circuit is described in Saito and Kitamura, xe2x80x9cSociety for Information Display (SID) International Symposium digest of technical papersxe2x80x9d, Vol. XXVI, pp.257-260 (1995). It is to be noted that each gray-scale voltage generator, disposed for a single pixel in the gray-scale voltage selector block 904 described in the literature, includes an enhancement transistor and a depletion transistor, as shown in FIG. 5, and disuses a transistor that is considered necessary to constitute the switch 904-2 shown in FIG. 4.
In the conventional resistor string method described above, although a 6-bit (64-level gray scale) drive circuit can be implemented without a significant problem, an attempt to realize gray-scale levels higher than 64 levels may cause the following problems.
A first problem is that employing a semiconductor integrated circuit implementing the drive circuit may cause the chip to significantly increase in size. This is because, among others, the number of gray-scale voltage selectors employed in the resistor string method is doubled and doubled as the level of gray scale increases bit by bit. For example, a 64-level gray-scale drive circuit requires 64 gray-scale voltage selectors per one output, whereas a 256-level gray-scale drive circuit requires 256 gray-scale voltage selectors, four times as many as those of the 64-level gray-scale drive circuit. This causes the die area to increase, leading to an increase in its size.
A second problem is that longer time may be required for testing the semiconductor integrated circuit after it is fabricated. The 64-level gray-scale drive circuit has 64 gray-scale voltage selectors per one output, and it is necessary to check the function of all the voltage selectors. Similarly, in the 256-level gray-scale drive circuit, it is necessary to check the function of all the 256 voltage selectors per one output. This may cause the testing time to increase four times, leading to an increase in testing cost.
It is therefore an object of the present invention to provide a drive circuit for driving an image display unit, such as a TFT (Thin Film Transistor) LCD unit, to display thereon multi-level gray-scale digital video data, especially such as having gray-scale levels of digital video data higher than eight bits per pixel, to realize reduction of the circuit scale, the die area, and the cost for testing the drive circuit.
The present invention provides a drive circuit for driving a display unit including: a gray-scale level voltage generator for generating a plurality of gray-scale level voltages, the gray-scale voltages corresponding to magnitudes of possible video data in one-to-one correspondence in a non-linear region of characteristic of liquid crystal transmittance and corresponding to magnitudes of possible video data in one-to-n correspondence in a linear region of characteristic of liquid crystal transmittance where n is an integer larger than one; a gray-scale voltage selector block for responding to input video data to select one of the gray-scale level voltages; a judgement section for judging whether a magnitude of an input video data resides within the non-linear region or the linear region to output a judgement signal indicating the non-linear region or the linear region; and an output circuit for responding to the judgement signal to output the one of the gray-scale level voltages selected by the gray-scale voltage selector block when the judgement signal indicates the non-linear region and output one of the gray-scale voltages or an intermediate voltage when the judgement signal indicates the linear region, the intermediate voltage residing between two of adjacent gray-scale voltages.
In accordance with the drive circuit of the present invention, use of the intermediate voltage between adjacent two of the gray-scale voltages in the linear region reduces the number of gray-scale voltages to be generated substantially without degrading the image quality of the image display unit to be driven by the drive circuit, and reduces the circuit scale of the drive unit and reduces the test procedures for the drive circuit. The intermediate voltage may be preferably obtained by interpolation of the adjacent two of the gray-scale voltages.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.